Keynote talk at DCIS 2019 by Dr. Vivek De, Intel Fellow at Intel corporation

The Spain Chapter of the IEEE Circuits and Systems Society sponsored the keynote presentation of the DLP Dr.  Vivek De at the DCIS 2020 conference that took place on 18th of November.

The title of the presentation was “Attack-Resistant Energy-Efficient SoC for Smart & Secure IoT”.

Abstract:

We will discuss SoC design challenges and opportunities for smart and secure cyberphysical systems in the emerging world of IoT, focusing on two distinct areas: (1) how to deliver uncompromising performance and user experience while minimizing energy consumption, and (2) how to provide cryptographic-quality “roots of trust” in silicon and resistance to physical side channel attacks with minimal overhead. We will present SoC designs that span a wide range of performance and power across diverse platforms and workloads, and achieve robust near-threshold-voltage (NTV) operation in nanoscale CMOS. We will discuss techniques to overcome the challenges posed by device parameter variations, supply noises, temperature excursions, aging-induced degradations, workload and activity changes, and reliability considerations. True Random Number Generator (TRNG) and Physically Unclonable Function (PUF) circuits, the two critical silicon building blocks for generating dynamic and static entropy for encryption keys and digital fingerprints, respectively, will be presented. We will also discuss power and electromagnetic physical side-channel-attack detection and mitigation techniques for enabling robust hardware security.

Presenters' bio:

Dr. Vivek De is DLP of CASS in 2020, and is IEEE Fellow.

Vivek De (Fellow, IEEE) received the B.Tech. degree in electrical engineering from the Indian Institute of Technology (IIT) Madras, Chennai, India, the M.S. degree in electrical engineering from Duke University, Durham, NC, USA, and the Ph.D. degree in electrical engineering from the Rensselaer Polytechnic Institute, Troy, NY, USA.,He is currently an Intel Fellow and the Director of Circuit Technology Research, Intel Labs, Hillsboro, OR, USA. He is responsible for providing strategic technical directions for long-term research in the future circuit technologies and leading energy efficiency research across the hardware stack. He has 303 publications in refereed international conferences and journals with a citation H-index of 79, and 229 patents issued with 32 more patents filed (pending).,Mr. De received the Intel Achievement Award for his contributions to an integrated voltage regulator technology, the 2019 IEEE Circuits and System Society (CASS) Charles A. Desoer Technical Achievement Award for “pioneering contributions to leading-edge performance and energy-efficient microprocessors and many-core system-on-chip (SoC) designs,” the 2020 IEEE Solid-State Circuits Society (SSCS) Industry Impact Award for “seminal impact and distinctive contributions to the field of solid-state circuits and the integrated circuits industry,” the Best Paper Award at the 1996 IEEE International ASIC Conference, nominations for the Best Paper Awards at the 2007 IEEE/ACM Design Automation Conference (DAC) and the 2008 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), “Most Frequently Cited Paper Award” in the IEEE Symposium on VLSI Circuits at its 30th Anniversary in 2017, the Outstanding Evening Session Award at the 2018 International Solid-State Circuits Conference (ISSCC), and the 2017 Distinguished Alumnus Award from IIT Madras. He also coauthored a paper nominated for the Best Student Paper Award at the 2017 IEEE International Electron Devices Meeting (IEDM). One of his publications was recognized in the 2013 IEEE/ACM Design Automation Conference (DAC) as one of the “Top 10 Cited Papers in 50 Years of DAC. ” He was recognized as a Prolific Contributor to the IEEE International Solid-State Circuits Conference (ISSCC) at its 60th Anniversary in 2013 and a Top 10 Contributor to the IEEE Symposium on VLSI Circuits at its 30th Anniversary in 2017. He served as the Distinguished Lecturer for the IEEE/EDS in 2011, the IEEE/SSCS in 2017–2018, and the IEEE/CASS D in 2020–2021.

Dr. de la Rosa has served as Distinguished Lecturer of the IEEE Circuits and Systems Society (term 2017-2018) and he is currently the Deputy Editor in Chief of the IEEE Transactions on Circuits and Systems II: Express Briefs. He served as Associate Editor for the IEEE Transactions on Circuits and Systems I: Regular Papers, where he received the 2012-2013 Best Associate Editor Award and served as Guest Editor of the Special Issue on the Custom Integrated Circuits Conference (CICC) in 2013 and 2014. He also served as Guest Editor of the Special Issue of the IEEE J. on Emerging and Selected Topics in Circuits and Systems on Next-Generation Delta-Sigma Converters. He is a member of the Analog Signal Processing Technical Committee of IEEE-CASS, member of the Steering Committee of IEEE MWSCAS and he has been involved in the organizing and technical committees of diverse international conferences, among others: IEEE ISCAS, IEEE MWSCAS, IEEE ICECS, IEEE LASCAS, IFIP/IEEE VLSI-SoC and DATE. He served as TPC chair of IEEE MWSCAS 2012, IEEE ICECS 2012, IEEE LASCAS 2015 and IEEE ISICAS (2018, 2019). He has been a member of the Executive Committee of the IEEE Spain Section (terms 2014-2015 and 2016-2017), where he served as Membership Development Officer during the term 2016-2017. He was also the Chair of the Spain Chapter of IEEE-CASS during the term 2016-2017.